ASIC/SOC/FPGA Design Verification/Validation Services
Our Services
ASIC/SOC/FPGA Verification
ASIC/SOC/FPGA Verification
ASIC/SOC/FPGA Verification
Give us your spec and RTL. We will give you fully verified design.
UVM TB
ASIC/SOC/FPGA Verification
ASIC/SOC/FPGA Verification
We can define the methodology required to verify your design, depending upon the design complexity
Post-Silicon Validation
ASIC/SOC/FPGA Verification
Post-Silicon Validation
It can be emulation or post-silicon validation, we have experts.
Synopsis of the projects we handle
Verify chip to chip communication between two multi-million gate SOCs
Verify chip to chip communication between two multi-million gate SOCs
Verify chip to chip communication between two multi-million gate SOCs
This is for our Tier-1 customer whose multi million gate SOC has a Telecom Serial Interface Port that is required to hook up with similar module on other chip. We created BFMs, test bench and required tests, sequences and checkers to verify the functionality.
Emulation of APB peripherals on FPGA
Verify chip to chip communication between two multi-million gate SOCs
Verify chip to chip communication between two multi-million gate SOCs
Establishing communication between various APB/AHB peripherals like UART, I2C, SPI, CAN, IrDA, USB etc with their counterparts. It can be wired or wireless, we can fully emulate the design on FPGA.
Pre-silicon verification of Power Management Controller
Verify chip to chip communication between two multi-million gate SOCs
Pre-silicon verification of Power Management Controller
An IP that powers entire chip and also the critical block that handles low power events of entire CPU is thoroughly verified by us. We always try to achieve zero bug escape to next level.
Cache Verification
Post silicon validation of FPGA product
Pre-silicon verification of Power Management Controller
L2 cache in a huge graphics processor which is responsible to tag and cache images is fully verified at IP level and sub-system level.
Post silicon validation of FPGA product
Post silicon validation of FPGA product
Post silicon validation of FPGA product
Customer's FPGA product has ARM processor communicating with various IPs on the fabric. We wrote the firmware required to initialize the processor and enable it to access registers of various sub-systems in the FPGA.
Fully owned verification
Post silicon validation of FPGA product
Post silicon validation of FPGA product
Customer's PCIe block is fully verified in this 48-processor huge design. We coded test bench that drives constrained random stimulus. Assertions have been coded to verify the functionality of the DUT. Functional coverage has been coded to measure the completeness of the verification.