ASIC/SOC/FPGA Design Verification/Validation Services
Give us your spec and RTL. We will give you fully verified design.
We can define the methodology required to verify your design, depending upon the design complexity
It can be emulation or post-silicon validation, we have experts.
This is for our Tier-1 customer whose multi million gate SOC has a Telecom Serial Interface Port that is required to hook up with similar module on other chip. We created BFMs, test bench and required tests, sequences and checkers to verify the functionality.
Establishing communication between various APB/AHB peripherals like UART, I2C, SPI, CAN, IrDA, USB etc with their counterparts. It can be wired or wireless, we can fully emulate the design on FPGA.
An IP that powers entire chip and also the critical block that handles low power events of entire CPU is thoroughly verified by us. We always try to achieve zero bug escape to next level.
L2 cache in a huge graphics processor which is responsible to tag and cache images is fully verified at IP level and sub-system level.
Customer's FPGA product has ARM processor communicating with various IPs on the fabric. We wrote the firmware required to initialize the processor and enable it to access registers of various sub-systems in the FPGA.
Customer's PCIe block is fully verified in this 48-processor huge design. We coded test bench that drives constrained random stimulus. Assertions have been coded to verify the functionality of the DUT. Functional coverage has been coded to measure the completeness of the verification.